1. Field of the Invention
This invention relates to complementary semiconductor devices and more particularly to improved complementary transistors having significantly improved isolation.
2. Description of the Prior Art
U.S. Pat. No. 4,346,513 discloses a method that includes etching a substrate to form depressions, doping their sidewalls and filling the depressions with an epitaxial layer.
U.S. Pat. No. 4,137,109 discloses a process which includes etching apertures in the substrate, doping the sidewalls to form channel stop regions, and filling the apertures with SiO.sub.2.
The above listed prior art shows the use of trenches and refilling the trenches with insulating materials for isolating active device regions in a substrate or an epitaxial layer. It is also known that the sidewalls of the trenches can be doped to form channel stopping regions and that the trenches can be filled with epitaxially grown material.
This prior art however fails to show how to incorporate these techniques in a process for making complementary transistor structures.